Scan design techniques

They are structured techniques for designing sequential circuits where testability is existing from the initial stage itself. But to identify an intermediate and internal state is the main cause for concern here. Through this approach we desire to minimize the testing problem in sequential circuit as well as in combinational logic circuits. The scan path, level sensitive scan design (LSDD), Boundary scan test (BST), surface mounted devices (SMD), printed circuit boards (PCB), Built-in self-test (BIST) etc. are the important terms in scan design techniques.